WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
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LOW POWER IP SILICON DESIGN ENGINEER
THE ROLE:
AMD is searching for an experienced Power Management IP Design & System modeling Engineer to join the low-power IP design team, responsible for developing cutting edge low-power IP and power management systems that bring differentiation to all AMD products. Join a dynamic team and give a boost to your personal career in a challenging and fascinating ever-growing, never-boring area! Looking forward to welcoming you in the team!
THE PERSON:
- Experience in Modeling of Power Delivery Networks on high performance processors, Analog Circuit Design, and Digital Design
- Solid knowledge of industry standard tools and practices for electrical system modeling, analog circuit design, digital design, mixed-mode simulation
- Quality-oriented mindset
- Strong and effective communication skills and team spirit
KEY RESPONSIBILITIES:
- Detailed Modeling & Analysis of power delivery network on AMD CPU and Graphics IP
- Low power IP Design, Architecture
- Closely work with SOC system & Power architects to define mixed signal IP design specifications
- Work closely with silicon packaging teams, design teams, power grid design team, CAD in putting together full system model to verify full power management cycle of voltage, frequency, and temperature driven changes
PREFERRED EXPERIENCE:
- Requires strong understanding of analog/mixed signal design concepts and CMOS processes
- Knowledge of basic analog blocks: Linear and Switching voltage regulators, DAC, ADC, comparators, oscillators
- Experience with simulation tools such as Spectre, Hspice, AFS, System Verilog.
- Experience in electrical modeling EDA and AMS tools such as HFSS, SIwave, HSPICE
- Experience with PCB, Package, and IC level power delivery networks
- Experience in silicon packaging and PCB design for signal and power integrity is a plus
- Experience with programming in Python, Matlab
- Experience in RTL design is a plus
- Experience in custom circuit design is a plus (Cadence virtuoso, ADE XL)
- Knowledge in the digital design flows including is a plus
ACADEMIC CREDENTIALS:
- Degree in Electrical/Computer Engineering, BS w/ 7+ years or MS w/ 5+ years of work exp or Ph D
LOCATION:
- Austin, TX / Santa Clara, CA
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At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail .
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
